New optimal error-correcting codes for crosstalk avoidance in on-chip data buses

Muhammad Ajmal; Xiande Zhang

doi:10.3934/amc.2020078

Article Contents

2021, Volume 15, Issue 3: 487-506. Doi: 10.3934/amc.2020078

This issue Previous Article Constructing self-dual codes from group rings and reverse circulant matrices Next Article Binary codes from

$ m $

-ary

$ n $

-cubes

$ Q^m_n $

New optimal error-correcting codes for crosstalk avoidance in on-chip data buses

Muhammad Ajmal and
Xiande Zhang^,

School of Mathematical Sciences, University of Science and Technology of China, Wu Wen-Tsun Key Laboratory of Mathematics, No. 96 Jinzhai Road, Hefei, 230026, Anhui, China

^* Corresponding author: Xiande Zhang
^* Corresponding author: Xiande Zhang

Received: September 30, 2019

Revised: February 29, 2020

Early access: April 2020

Published: August 2021

The first author is supported by the Chinese Scholarship Council at USTC, China. The second author is supported by NSFC grant 11771419, and by the Fundamental Research Funds for the Central Universities

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Abstract

Codes that simultaneously provide for low power dissipation, cross-talk avoidance, and error correction in the ultra deep submicron/nanometer VLSI fabrication, were recently introduced by Chee et al. in 2015. Such codes were revealed to be closely related to balanced sampling plans avoiding adjacent units, which are widely used in the statistical design of experiments. In this paper, we construct a new family of optimal codes with such properties, by determining the maximum size of packing sampling plans avoiding certain units.

Keywords:

Constant weight codes,
packing sampling plan avoiding adjacent units,
crosstalk avoidance,
packing by triples,
balanced sampling plan.

Mathematics Subject Classification: Primary: 05B07, 05B40; Secondary: 94B25.

Citation:

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Figure 1. Leave graphs of LPSA$ (6n,3;2) $ having $ 3n $ edges

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Figure 2. Points of the hole are denoted by $ \bullet $ and others by $ \circ $

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Figure 3. Points of the hole are denoted by $ \bullet $ and others by $ \circ $

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Table 1. Types of worst crosstalk couplings

Type-Ⅰ	Type-Ⅱ	Type-Ⅲ	Type-Ⅳ
$ 0\longleftrightarrow1 $		$ 001\longleftrightarrow010 $	$ 010\longleftrightarrow101 $
	$ 001\longleftrightarrow110 $	$ 010\longleftrightarrow100 $
	$ 011\longleftrightarrow100 $	$ 011\longleftrightarrow101 $
		$ 101\longleftrightarrow110 $
Single wire undergoes transition. Adjacent wires maintain previous states	Center wire in opposite transition to an adjacent wire. The other wire in same transition as center wire	Center wire in opposite transition to an adjacent wire. The other wire maintains previous state	All three adjacent wires undergo opposite transitions

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Table 2. Upper bounds and leave graphs of CPSAs and LPSAs excluding edges within distance two

Sampling plans	Upper bounds	Leave graphs
CPSA$ (6n,3;2) $	$ 6n(n-1) $	A perfect matching
CPSA$ (6n+1,3;2) $	$ n(6n-3)-2 $	A cycle of length four
LPSA$ (6n,3;2) $	$ 6n(n-1)+1 $	see Fig. 1
LPSA$ (6n+1,3;2) $	$ n(6n-3) $	A single edge

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Table 3. Existence results of small orders

$ n $	$ 24 $	$ 25 $	$ 30 $	$ 31 $	$ 36 $	$ 37 $	$ 48 $	$ 49 $
$ B^{\circ}(n,3;2) $	$ - $	$ 82 $	$ - $	$ 133 $	$ - $	$ 196 $	$ 336 $	$ 358 $
$ B(n,3;2) $	$ 73 $	$ 84 $	$ 121 $	$ 135 $	$ 181 $	$ 198 $	$ 337 $	$ 360 $

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Table 4. Parameters for proof of Lemma 4.6

n=3g+t-1	g	t	s
72s=3(24(s-1)+18)+18	24(s-1)+18	19	$s\geq 1, \ s\neq 1$
72s+24=3(24(s-1)+18)+42	24(s-1)+18	43	$s\geq 1, \ s\neq 1,2,3$
72s+48=3(24s+12)+12	24s+12	13	$s\geq 1$

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Table 5. Parameters for proof of Lemma 4.8

$n\quad \ \ \ \ \ \ =3g+t$	$g$	$t$	$s$
$72s+1 \ =3(24(s-1)+18)+19$	$24(s-1)+18$	$19$	$s\geq 1,\ s\neq 1$
$72s+7 \ =3(24s)+7$	$24s$	$7$	$s\geq 1$
$72s+13=3(24(s-1)+18)+31$	$24(s-1)+18$	$31$	$s\geq 1,\ s\neq 1,2,3$
$72s+19=3(24s+6)+1$	$24s+6$	$1$	$s\geq 1$
$72s+25=3(24(s-1)+18)+43$	$24(s-1)+18$	$43$	$s\geq 1, \ s\neq 1,2,3$
$72s+31=3(24s+6)+13$	$24s+6$	$13$	$s\geq 1, \ s\neq 1$
$72s+37=3(24(s-1)+12)+1$	$24(s-1)+12$	$1$	$s\geq 1, \ s\neq 1$
$72s+43=3(24s+6)+25$	$24s+6$	$25$	$s\geq 1, \ s\neq 1$
$72s+49=3(24s+12)+13$	$24s+12$	$13$	$s\geq 1$
$72s+55=3(24s+18)+1$	$24s+18$	$1$	$s\geq 1$
$72s+61=3(24s+18)+7$	$24s+18$	$7$	$s\geq 1$
$72s+67=3(24s+6)+49$	$24s+6$	$49$	$s\geq 1, \ s\neq 1,2,3$

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